Transistors

ABSTRACT

A transistor having a high inverse gain value, and especially a multi-emitter transistor, is provided both with an additional feedback emitter directly connected to the base and positioned adjacent to the base contact, together with a base resistor portion between the region of the base having the base contact and the additional emitter and the region of the base in which each other emitter is formed.

United States Patent ['19,

Bruchez Oct. 16, 1973 TRANSISTORS Inventor: Jeffrey Alan Bruchez, HazelGrove,

Cheshire, England Assignee: Ferranti Limited, Lancashire,

England Filed: Mar. 27, 1972 Appl. No.: 238,278

US. Cl..... 317/235 R, 317/235 Z, 317/235 AE Int. Cl. H011 9/00 Field ofSearch 317/235 References Cited UNITED STATES PATENTS 3,657,612 4/1972Wiedmann 317/235 12/1971 Myers 317/235 8/1969 Worchel et a1. 317/235Primary ExaminerJohn W. Huckert Assistant Examiner-E. WojciechowiczAttorney-Edward J. Kondracki [5 7] ABSTRACT A transistor having a highinverse gain value, and especially a multi-emitter transistor, isprovided both with an additional feedback emitter directly. connected tothe base and positioned adjacent to the base contact, together with abase resistor portion between the region of the base having the basecontact and the additional emitter and the region of the base in whicheach other emitter is formed.

11 Claims, 5 Drawing Figures m 25 2/ I6 19 5 4 I5 26 '75 j V/AV/l/ 1TRANSISTORS This invention relates to transistors.

Some forms of construction of transistors have high inverse gain values,especially transistors which are provided in shallow epitaxial layers onsemiconductor substrates, for example, transistors having the so-calledcollector-diffusion-isolation construction. A high inverse gain valuefor a transistor implies that the transistor has a high inverse leakagecurrent when the collector-base P-N junction is forward biased and theemitter is at a high potential level, the inverse current leakage beingcaused by charge carriers being re-injected into the base from thecollector.

When more than one emitter is provided, in the operation of thetransistor, different emitters may be at different potential levels.Thus, unwanted current leakage may occur between the emitters, chargecarriers being injected into the base by an emitter at a low potentiallevel, and these charge carriers being collected by an emitter at a highpotential level after being re-injected by the collector.

It is known to reduce the inverse current leakage by a combination ofdoping the device with a material such as gold which decreases thelifetime of stored minority charge carriers, and by having a base with afirst region, in which the emitter or emitters are provided, connectedby a resistor portion to a second region, to which the base contact isprovided. The provision of the resistor portion reduces the leakagecurrent due to charge carriers being re-injected by the collector, bybiasing off the part of the collector-base P-N junction closest to theemitters, and so there is less injection of charge carriers into thefirst region of the base in which the emitters are provided. Previously,gold doping has been necessary in order to improve the switching time ofthe transistor when employed as a current switch.

However, it is undesirable to dope any form of device with gold as thisstep-reduces manufacturing yields and is an extra processing step. Thisis especially so for devices provided in shallow epitaxial layers, andgold doping generally is not done when manufacturing such devices.

It is an object of the present invention to provide a transistor havinga high inverse current gain value and which has a low current leakagedue to charge carriers being re-injected by the collector, and a fastswitching speed without requiring the device to be doped with gold.

According to the present invention a transistor having a high inversecurrent gain value includes a collector, a base comprising a firstregion connected to a second region by a resistor portion, a basecontact to the second region, at least one emitter within the firstregion and an additional, feedback emitter adjacent to the base contactand directly connected to the base.

The additional, feedback emitter collects'-charge carriers re-injectedby the collector and feeds them back to the base, causing the transistorto have a fast switching speed. Thus, both the desired reduction in thecurrent leakage and a fast switching speed is obtained. The positioningof the additional emitter adjacent to the base contactimplies that thefeedback current has an optimum value. This is because, the majority ofthe re-injection of charge carriers from the collector now takes placeadjacent to the base contact because of the provision of the baseresistor portion.

The present invention will now be described by way of example withreference to the accompanying drawings, in which FIG. 1 is a plan viewof one embodiment of a multiemitter transistor according to the presentinvention,

FIG. 2 is a circuit diagram of the semiconductor device of FIG. 1,

FIG. 3 is a section on the line Ill III of FIG. 1,

FIG. 4 is a plan view of a second embodiment of a multi-emittertransistor according to the present invention, and

FIG. 5 is a section on the line V V of FIG. 4.

The illustrated multi-emitter N-P-N transistor comprises part of asemiconductor integrated circuit having a semiconductor body with a Ptype substrate 12 and a shallow P-type epitaxial layer 13. Thetransistor 10 is of the so-called collector-diffusion-isolationconstruction, and is manufactured by a known method. The collectorcomprises both a buried N+ type layer 14 at the interface between theepitaxial layer 13 and the substrate 12, together with an N+ typeisolation barrier 15 around the device 10 and extending through theepitaxial layer to the N+ type buried layer 14. Two N+ type emitters l6and 17, and an additional, feedback emitter 18, are diffused into the Ptype epitaxial base 19 defined by the collector 14, 15. A silicon oxidepassivating layer is provided on the surface of the transistor thislayer not being shown in the Figures. Contacts 20, 21 and 22 areprovided respectively to the collector 14, and to the emitters 16 and17; and a common contact 24 is provided to the base 19 and to theadditional emitter 18, the contact 24 spanning a part of the P-Njunction between the base and the additional emitter. The emitters 16and 17 are within a first region 25 of the base, and the base contact24, and the additional emitter 18 are respectively on and within asecond re gion 26 of the base 19 which is connected to the first region25 by a resistor portion 27. The cross-sectional area of the basetransverse to thedirection of movement of charge carriers between thebase contact 24 and the emitters 16 and 17 within the first region 25 issmaller for the resistor portion 27 than for the first region 25. Theresistor portion 27 is defined between a part 28 of the collector havingthe collector contact 20 and a tongue part 29 of the collector extendingbetween the first region 25 of the base and the second region 26 of thebase having the base contact 24.

The provision of the resistor portion 27 causes the part of thecollector-base P-N junction adjacent to the emitters l6 and 17 withinthe first region of the base to be biased off. Hence, the number ofcharge carriersreinjected from the collector into the first region ofthe base adjacent to the emitters 16 and 17 is reduced, reducing theinverse current leakage of the device, when the collector-base P-Njunction is forward biased and at least one of the emitters 16 and 17 isat a high poten-',

tial level. A component of the unwanted leakage current occurs due totransistor action between the emitters 16 and 17. This transistor actionis when one emitter 16 or 17 is at a lower potential level than theother, and charge carriers are injected by the emitter at the lowerpotential level into the base and are re-injected by the collector to becollected by the emitter at the 'higher potential level. However, theprovision of the resistor'base portion 27 also reduces the magnitude ofthis current leakage. The majority of charge carrier reinjection takesplace adjacent to the base contact 24 and the additional emitter 18collects the charge carriers and feeds them back to the base. Hence, theadditional, feedback emitter 18 causes a reduction of stored chargewithin the device when it is in a saturated condition. Thus, theswitching time of the device is reduced when employed as a currentswitch.

A second embodiment of a multi-emitter transistor according to thepresent invention is shown at 30 in FIGS. 4 and 5. The transistor 30also may be represented by the circuit diagram of FIG. 2, and parts ofthe transistor 30 either closely resembling or identical to parts of thetransistor of FIGS. 1 to 3 are given the same reference numerals as theembodiment of FIGS. 1 to 3.

In the transistor 30, however, the base resistor portion 27' is betweenthe buried layer 14 part of the collector and the additional emitter 18.The additional emitter l8 encircles the part of the base to which thebase contact 24 is provided at the contact-bearing surface of thedevice. Again, the base contact 24' spans a part of the emitter-base P-Njunction and makes contact with the additional emitter 18, and forconvenience of fabrication, the contact 24 may extend beyond theemitter-base P -N junction at two opposing points. The cross-sectionalarea of the base 19 transverse to the direction of movement of chargecarriers between the base contact 24' and the emitters 16 and 17 issmaller for the resistor portion 27 than for the first region 25Further, the effective area of the base resistor portion 27. isrestricted by the spread of the depletion layers associated with theemitter-base and collector-base P-N junctions into the base resistorportion 27' during operation of the device. Such an arrangement requiresless area of the epitaxial layer 13 than the multi-emitter transistor 10of FIG. 3.

The base resistor portion may be between the additional emitter and thecollector in an arrangement in which the additional emitter does notencircle the part of the base to which the base contact is provided.

- Other forms of transistor construction than thecol]ector-diffusion-isolation construction, but which have a highinverse gain value, may have an additional, feedback emitter inaccordance with the present invention. Thus, it is possible to reducethe magnitude of the unwanted current leakage, and also reduce theswitching time of the device. Transistors provided in shallow epitaxiallayers usually have high inverse current gain values. Further, thetransistor may have only one emitter in the first region of the base.

What we claim is:

l. A transistor having a high inverse current gain value, comprising acollector, a base comprising a first region, a second region and aresistor portion connecting said first region to said second region, abase contact to the second region, at least one emitter within the firstregion, and an additional emitter within said second region, saidadditional emitter being adjacent to the base contact anddirectlyconnected to the base.

2. A transistor as claimed in claim 1 having a plurality of emitterswithin the first region of the base.

3. A transistor as claimed in claim 1 which is formed in a semiconductorbody comprising an epitaxial layer of one conductivity type on asemiconductor substrate of the same conductivity type, the transistorhaving a collector of the opposite conductivity type comprising both aheavily doped isolation barrier for the transistor and a heavily dopedburied layer at the interface between the epitaxial layer and thesubstrate, the isolation barrier extending through the epitaxial layerinto contact with the buried layer.

4. A transistor as claimed in claim 1 in which the base contact spans apart of the P-N junction between the base and the additional emitterforming a common contact to the base and the additional emitter.

5. A transistor as claimed in claim 1 in which the cross-sectional areaof the base transverse to the direction of movement of charge carriersbetween the base contact and each emitter within the first region issmaller for the resistor portion than for the first region.

6. A transistor as claimed in claim 1 in which the base resistor portionis between the additional emitter and the collector of the transistor.

7. A transistor as claimed in claim 6 having the additional emitterencircling a part of the base to which the base contact is provided.

8. A transistor as claimed in claim 6 in which the cross-sectional areaof the base transverse to the direction of movement of charge carriersbetween the base contact and each emitter within the first region issmaller for the resistor portion than for the first region.

9. A transistor as claimed in claim 6 in which the base contact spans apart of the P-N junction between the base and the additional emitterforming a common contact to the base and the additional emitter.

10. A transistor formed in an epitaxial layer of one conductivity typeon a substrate of the same conductivity type and having a high inversecurrent gain value comprising a collector of the opposite conductivitytype comprising both a heavily doped isolation barrier and a heavilydoped buried layer, saidisolation barrier extending through theepitaxial layer into contact with the buried layer, a base comprising afirst region, a second region and a resistor portion connecting saidfirst region to said second region, at least one emitter within saidfirst region, a feedback emitter within said second region, anda basecontact spanning the junction between the base and the feedback emitterforming a common contact to the base and said feedback emitter.

11. A transistor as claimed in claim 10 in which the cross sectionalarea of the base transverse to the direction of movement of chargecarriers between the base contact and each emitter within the firstregion is smaller for the resistor portion than for the first region,and said resistor portion being defined between a first part ofthe'collector and a second part of the collector extending between saidfirst and said second base regions.

NITED STATES PATENT OFFICE fiERTHiCATE @F ORRECTION Patent 1 765' A49Dated nm-Qhpr 16 1 Q7;

Inventor(s) Jeffrey Alan Bruchez It is certified that error appears inthe above-identified patent and that said Letters Patent are herebycorrected as shown below:

On the front page, the format failed to include the priority informationwhich should appear after line "[21]" as follows: [30] ForeignApplication Priority Data March 26, 1971 Great Britain 8719/71; Column3, line 50, "we" should read -I-.

Signed and sealed this 5th day of March 197L (SEAL) Attest: I

EDWARD MJ LETCHERJR, ALL DANN Attesting Officer Commissioner of vPatentsFORM PC2-1050 (10-59) USCOMM-DC GO376-P59

1. A transistor having a high inverse current gain value, comprising acollector, a base comprising a first region, a second region and aresistor portion connecting said first region to said second region, abase contact to the second region, at least one emitter within the firstregion, and an additional emitter within said second region, saidadditional emitter being adjacent to the base contact and directlyconnected to the base.
 2. A transistor as claimed in claim 1 having aplurality of emitters within the first region of the base.
 3. Atransistor as claimed in claim 1 which is formed in a semiconductor bodycomprising an epitaxial layer of one conductivity type on asemiconductor substrate of the same conductivity type, the transistorhaving a collector of the opposite conductivity type comprising both aheavily doped isolation barrier for the transistor and a heavily dopedburied layer at the interface between the epitaxial layer and thesubstrate, the isolation barrier extending through the epitaxial layerinto contact with the buried layer.
 4. A transistor as claimed in claim1 in which the base contact spans a part of the P-N junction between thebase and the additional emitter forming a common contact to the base andthe additional emitter.
 5. A transistor as claimed in claim 1 in whichthe cross-sectional area of the base transverse to the direction ofmovement of charge carrIers between the base contact and each emitterwithin the first region is smaller for the resistor portion than for thefirst region.
 6. A transistor as claimed in claim 1 in which the baseresistor portion is between the additional emitter and the collector ofthe transistor.
 7. A transistor as claimed in claim 6 having theadditional emitter encircling a part of the base to which the basecontact is provided.
 8. A transistor as claimed in claim 6 in which thecross-sectional area of the base transverse to the direction of movementof charge carriers between the base contact and each emitter within thefirst region is smaller for the resistor portion than for the firstregion.
 9. A transistor as claimed in claim 6 in which the base contactspans a part of the P-N junction between the base and the additionalemitter forming a common contact to the base and the additional emitter.10. A transistor formed in an epitaxial layer of one conductivity typeon a substrate of the same conductivity type and having a high inversecurrent gain value comprising a collector of the opposite conductivitytype comprising both a heavily doped isolation barrier and a heavilydoped buried layer, said isolation barrier extending through theepitaxial layer into contact with the buried layer, a base comprising afirst region, a second region and a resistor portion connecting saidfirst region to said second region, at least one emitter within saidfirst region, a feedback emitter within said second region, and a basecontact spanning the junction between the base and the feedback emitterforming a common contact to the base and said feedback emitter.
 11. Atransistor as claimed in claim 10 in which the cross sectional area ofthe base transverse to the direction of movement of charge carriersbetween the base contact and each emitter within the first region issmaller for the resistor portion than for the first region, and saidresistor portion being defined between a first part of the collector anda second part of the collector extending between said first and saidsecond base regions.